completed

4-Bit Nano Processor on FPGA

VHDL project

nano

Overview

A custom 4-bit nano processor designed from the ground up in VHDL and implemented for FPGA hardware. The processor combines an instruction ROM, program counter, instruction decoder, 8-register bank, arithmetic datapath, multiplexers, conditional jump logic, and status flags into a complete processing unit. The design exposes register values and processor states through onboard LEDs and a seven-segment display, with dedicated simulation/testbench modules for validating individual components and the integrated CPU.

Tech stack

  • VHDL